Jump to: Education • Skills • Experience • Achievements • Publications


🙋‍♂️ About Me

I am a SoC design engineer at SiFive, enabling development of silicon at the speed of software. I work on developing configurable generators in CHISEL to design complex RISC-V SoC IPs. I recently completed my PhD in Computer Science and Engineering under the guidance of Dr Swaroop Ghosh in the Lab of Green and secure Integrated Circuit Systems (LOGICS) at Penn State University, where my research was on developing security designs in hardware for protecting RISC-V based SoCs and their supply chain.


👨‍🎓 Education

Ph.D. • The Pennsylvania State University • May’21
B.Tech. • National Institute of Technology Durgapur • Jun’14


🛠️ Skills

Programming: C/C++, Python, Java, C#, CHISEL, Scala, Verilog
Software: Synopsys VCS, Xilinx Vivado, Cadence Virtuoso, Visual Studio, Perforce
Technologies/Frameworks: RocketChip (RISC-V), GNU/Linux, Git, Microsoft .NET, Android SDK


👨‍💼 Research and Work Experience

Senior SoC Generator Design Engineer • SiFive, Inc. • May’21 - present
  • Working on designing scalable generators for RISC-V SoCs.
PhD Researcher • The Pennsylvania State University • Aug’16 - May’21
  • Security Extensions for RISC-V: Developed a RISC-V hardware accelerator platform for protection against common memory corruption vulnerabilities, such as, buffer overflows using hardware shadow stacks, PUF-based randomized canaries, and hardware bounds checking.
  • Data Leakage Exploits using Hardware Trojans: Developed a hardware Trojan based system exploit that can leak data from a process’s address space and perform privilege escalation.
  • Camouflaged Gates for Reverse Engineering Prevention: Developed a multi-input multi-function camouflaged gate based on threshold voltage logic to prevent reverse engineering of circuits. Developed a charge-trap and NV-FeFET based camouflaged gate to thwart RE attacks involving untrusted foundries.
Digital Design Engineer Intern • SiFive, Inc. • May - Aug’19,’20
  • Unified Overlay API: Prototyped a new unified API for overlay placement for peripheral CHISEL devices to facilitate faster and easier overlay instantiations for both FPGA and ASIC platforms.
  • SiFive Address Guard Extension Module: Designed security architectures for policy-based memory protection in SiFive Core IPs. Implemented security module RTL using CHISEL and created system test code in C for design sanity checks.
Software Engineer • Samsung R&D Institute India • Jun’14 - Dec’15
  • Samsung Knox: Worked on development and commercialization of Samsung Knox, an enterprise mobile security solution by Samsung. Refined Knox application experience during OS upgrades for mobile devices. Performed automated upstream sanity checks of Knox containers.
Summer Research Intern • Saha Institute of Nuclear Physics • Jun’14 - Dec’15
  • Automated Rough Set Clustering: Implemented an automated unsupervised rough-set clustering methodology for pattern recognition. [Supervisor: Dr. Gautam Garai, Scientist ‘G’, Comp. Sc. Div., SINP]


👨‍🏫 Teaching Experience

Teaching Assistant • CMPSC131, PennState • Aug’20 - May’21
  • Assisted a class of over 600 students during weekly programming labs, recitations, and office hours.
  • Set up dev environment and assignment submission infrastructure with version control to aid students.
  • Set up and assisted in various course logistics including setting up Microsoft Teams classroom to facilitate classroom discussions during remote learning
Teaching Assistant • CMPSC101, PennState • Aug’16 - May’17
  • Assisted a class of 200 students during weekly programming labs, recitations, and office hours.
  • Taught python concepts during programming labs.
  • Prepared and graded assignments and exams.
Primary Course Instructor • CDA3201, USF • May - Aug’16
  • Taught a class of 50 students.
  • Prepared course outline, lecture materials and assignments.
Instructor • Programming Resource Centre, USF • Jan - Aug’16
  • Assisted students from various disciplines with programming concepts.


🏆 Achievements

  • Graduate Teaching Assistantship Award for outstanding contributions at PennState EECS, 2021
  • Best Paper Award in Annual Conference of American Society for Engineering Education (ASEE) ECE Division, 2020
  • Best Poster Award in IEEE International Symposium on Hardware Oriented Security and Trust (HOST), 2017
  • Top 5 Finalist for Embedded Security Challenge in Cybersecurity Awareness Week (CSAW), 2017
  • A. Richard Newton Young Fellow fellowship for the 53rd Design Automation Conference (DAC), 2016


📜 Publications

Journals

Total: 6
  1. Cache-Out: Leaking Cache Memory Using Hardware Trojan
    Md Nasim Khan • Asmit De • Swaroop Ghosh
    IEEE Transactions on Very Large Scale Integration Systems (TVLSI)
    April 2020
  2. Hardware Assisted Buffer Protection Mechanisms for Embedded RISC-V
    Asmit De • Aditya Basu • Swaroop Ghosh • Trent Jaegar
    IEEE Transactions on Computer-Aided Design on Integrated Circuits and Systems (TCAD)
    March 2020
  3. HarTBleed: Using Hardware Trojans for Data Leakage Exploits
    Asmit De • Md Nasim Khan • Karthikeyan Nagarajan • Swaroop Ghosh
    IEEE Transactions on Very Large Scale Integration Systems (TVLSI)
    January 2020
  4. Threshold-defined logic and interconnect for protection against reverse engineering
    Jae-Won Jang • Asmit De • Deepak Vontela • Ithihasa Nirmala • Swaroop Ghosh • Anirudh Iyengar
    IEEE Transactions on Computer-Aided Design on Integrated Circuits and Systems (TCAD)
    December 2018
  5. Replacing eFlash with STTRAM in IoTs: security challenges and solutions
    Asmit De • Md Nasim Khan • Jongsun Park • Swaroop Ghosh
    Journal of Hardware and Systems Security, Special Issue on IoT Security
    December 2017
  6. Towards the hierarchical design of multilayer QCA logic circuit
    Bibhash Sen • Anirban Nag • Asmit De • Biplab Sikdar
    Journal of Computational Science (JCS)
    October 2015

Conferences

Total: 11
  1. Power Side Channel Attack Analysis and Detection
    Navyata Gattu • Asmit De • Md Nasim Khan • Swaroop Ghosh
    IEEE/ACM International Conference On Computer Aided Design (ICCAD)
    November 2020
  2. Recent Advances in Emerging Technology-based Security Primitives, Attacks and Mitigation
    Karthikeyan Nagarajan • Asmit De • Sina Ensan • Abdullah Ash-Saki • Md Nasim Khan • Swaroop Ghosh
    IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)
    August 2020
  3. Hands-on Cybersecurity Curriculum Using a Modular Training Kit
    Asmit De • Md Nasim Khan • Karthikeyan Nagarajan • Abdullah Ash-Saki • Mahabubul Alam • Taylor Wood • Matthew Johnson • Manoj Saripalli • Yu Xia • Stephanie Cutler • Swaroop Ghosh • Kathleen Hill • Annmarie Ward
    American Society for Engineering Education Annual Conference (ASEE)
    June 2020
  4. TrappeD: Assessing eDRAM/DRAM Trojans and Countermeasures for Information Leakage and Fault Injection
    Karthikeyan Nagarajan • Asmit De • Md Nasim Khan • Swaroop Ghosh
    International Workshop on Microprocessor/SoC Test, Security and Verification (MTV)
    December 2019
  5. Armor PLC: A Platform for Cyber Security Threats Assessments for PLCs
    Wenhui Zhang • Yizheng Jiao • Dazhong Wu • Srivatsa Srinivasa • Asmit De • Swaroop Ghosh • Peng Liu
    International Conference on Production Research Manufacturing Innovation: Cyber Physical Manufacturing
    August 2019
  6. FIXER: Flow Integrity Extensions for Embedded RISC-V
    Asmit De • Aditya Basu • Swaroop Ghosh • Trent Jaegar
    Design, Automation & Test in Europe Conference & Exhibition (DATE)
    March 2019
  7. CTCG: Charge-trap based camouflaged gates for reverse engineering prevention
    Asmit De • Anirudh Iyengar • Md Nasim Khan • Sung-Hao Lin • Sandeep Thirumala • Swaroop Ghosh • Sumeet Gupta
    IEEE International Symposium on Hardware Oriented Security and Trust (HOST)
    April 2018
  8. Preventing Reverse Engineering using threshold voltage defined multi-input camouflaged gates
    Asmit De • Swaroop Ghosh
    IEEE International Symposium on Technologies for Homeland Security (HST)
    April 2017
  9. Recent Trends in Intellectual Property (IP) Protection from Reverse Engineering
    Jae-Won Jang • Asmit De • Swaroop Ghosh
    International Workshop on Microprocessor/SoC Test, Security and Verification (MTV)
    December 2016
  10. Security and privacy threats to on-chip non-volatile memories and countermeasures
    Swaroop Ghosh • Md Nasim Khan • Asmit De • Jae-Won Jang
    IEEE/ACM International Conference On Computer Aided Design (ICCAD)
    November 2016
  11. Multilayer design of QCA multiplexer
    Bibhash Sen • Anirban Nag • Asmit De • Biplab Sikdar
    Annual IEEE India Conference (INDICON)
    December 2013